During memory reading, a read disturbance error may occur. The read disturbance error refers to that, if the gate voltage of the memory cell transistor is too high, the electrons in the channel or the electrons/electronic holes in the source/drain are drawn to the floating gate to change the storage data (from “1” to “0”). For example, during reading on a selected page, if the gate voltage applied to the gate of the transistors of the unread page is too high, the read disturbance error may occur in the unread page. If the number of the reading operations is thousands or millions, the read disturbance error may be more serious.
Therefore, the application discloses a memory device and a reading method thereof, which may reduce the read disturbance error.